The present invention is directed toward Random Access Memories (RAMs) and particularly toward static RAMs for use in radiation environments. There has always been a direct relationship between the radiation induced upset rate requirements and the performance requirement of radiation hardened static Random Access Memories. In the past, to achieve a low radiation induced upset rate, the performance of the RAM had to be compromised.
The military and space markets have created a need for electronic systems which can operate in high radiation environments. Most applications for these systems also require high performance, high complexity, and very low power, e.g., satellite applications. Moreover, these systems generally are memory intensive, thereby creating a growing radiation hardened, CMOS memory market. Therefore, there is a need to develop new technologies that are radiation hardened, i.e., have a tolerance or immunity to radiation effects. Other equivalent phrases include radiation hard or rad hard.
Radiation can interact with silicon based material and can cause many undesirable effects in circuit operation. For example, radiation can change the conductance of MOS transistors by changing the threshold voltage (Vt). Many of these undesirable effects can be minimized by using a radiation hardened process technology. However, in Very Large Scale Integration (VLSI) circuits, radiation can also generate significant levels of transient voltage and current disturbances on internal nodes, including power and ground. These internal disturbances can slow circuit performance or even upset circuit operation, e.g. changing the state of a memory cell. Simply having a radiation hardened process is not adequate to suppress these effects. There are specific design techniques which must be considered to adequately harden VLSI circuits.
In order to analyze radiation effects on circuits, it is common practice to categorize the radiation environment into the following four categories: (1) total dose, (2) dose rate, (3) Single Event Upset (SEU), and (4) neutron effects. The present invention is directed toward decreasing the SEU rate.